Counter trigger control register 0
CAPTURE_SEL | Selects one of the 16 input triggers as a capture trigger. Input trigger 0 is always ‘0’ and input trigger is always ‘1’. In the PWM, PWM_DT and PWM_PR modes this trigger is used to switch the values if the compare and period registers with their buffer counterparts. |
COUNT_SEL | Selects one of the 16 input triggers as a count trigger. In QUAD mode, this is the first phase (phi A). Default setting selects input trigger 1, which is always ‘1’. |
RELOAD_SEL | Selects one of the 16 input triggers as a reload trigger. In QUAD mode, this is the index or revolution pulse. In this mode, it will update the counter with 0x8000 (counter midpoint). |
STOP_SEL | Selects one of the 16 input triggers as a stop trigger. In PWM, PWM_DT and PWM_PR modes, this is the kill trigger. In these modes, the kill trigger is used to either temporarily block the PWM outputs (PWM_STOP_ON_KILL is ‘0’) or stop the functionality (PWM_STOP_ON_KILL is ‘1’). For the PWM and PWM_DT modes, the blocking of the output signals can be asynchronous (STOP_EDGE should be NO_EDGE_DET) in which case the blocking is as long as the trigger is ‘1’ or synchronous (STOP_EDGE should be RISING_EDGE) in which case it extends till the next terminal count event. |
START_SEL | Selects one of the 16 input triggers as a start trigger. In QUAD mode, this is the second phase (phi B). |